As my previous post described, I planned to use a single CPLD to perform all the glue-logic and associated functions. As it turned out, this was not possible due to the number of pins required. Roughly speaking I require the following IO pins:
- 6 address lines for decoding
- RAM, ROM, DUART, IDE, chip selects (4 in total)
- 6 expansion IO selects (to give 6 additional devices on expansion PCBs)
- R/W, E, and Q inputs
- READ and WRITE outputs
- /RESET in and RESET out (for the DUART)
- 8 data lines
- 8 IDE latch lines
- 5 bank switching address outputs
- /NMI, /IRQ and /FIRQ outputs
- DUART and IDE IRQ inputs
- 4 expansion interrupt inputs
The logical thing to do is put the things which require the data bus on there own CPLD, and leave the address decoding and related functions on the other. Also, since I now have about 68 pins I have the luxury of using a few more:
- ROM write protect inputs (whole EOM and bootcode) so the WRITE line can be filtered so some parts of the ROM can be write protected
- 8 address line inputs instead of 6
- 8 expansion selects instead of 6
Ideally I would use a single PLCC84 CPLD. It would certainly make the PCB a bit simpler, and I would not have to feed lines between two CPLDs. But since I want to try the circuit on breadboard before I make up a PCB I will have to use two 44 pin devices.
The circuit might get some small changes, but more or less it will be the following:
The DUART will drive two serial interfaces: one available via a 3 pin PCB header, and the other one (as well as being on a 3 pin header) will also be available via a standard RS232 DB9 connector, which is driven with a MAX232. For fun (and for debugging) the two non serial outputs on the DUART (OP1 and OP2) are attached to two LEDs.
One thing I have not yet figured out is how I will power the board. Using a USB port for power is a bit odd and not very in keeping with the rest of the computer. So I might use a standard barrel connector instead. On the other hand, USB is very convenient.
I am still waiting for two more PLCC44 to DIP44 adapters. Once I have them I will start making up the computer on breadboard. In the meantime, since I'm pretty confident the computer will work first time on breadboard, I have begun to layout the PCB. This has proven to be much more of a challenge then the previous iteration of the computer, mostly because of the PLCC44 sockets. The board layout is about 90% done.
Roughly speaking the jobs to be done, and the order they need to be done in is:
- Assemble the computer on breadboard
- Write the VHDL code for the CPLDs (the simplest possible at first, without the 16bit IDE latch, interrupt routing etc)
- Test out the computer
- Finish the PCB
- Get the PCB made
- Sound, video, and some kind of keyboard interface
- General expansion, 65SPI, VIA etc