Friday, 23 October 2015

Prototyping and tweaks to the MAXI09

I have been busy the last few weeks prototyping up the remaining untested parts of MAXI09.

The first thing I wanted to do was to confirm the functioning of the AD8013 (PDF) video amplifiers. This did not go well at all. After attaching one to a SOIC-14 breakout adapter and plugging it into the circuit on the breadboard, I was unable to get a picture on the TV. Unfortunately I still do not own an oscilloscope so have no way to track this problem down. Also analogue electronics remains mostly a mystery to me, so it was very difficult for me to figure out the issue.

I have had success from a transistor-based amplifier circuit however. My circuit is shamelessly borrowed from the MSX-2 and was supplied by lordbubsy of the 6502.org forums. Whilst the picture is not a great deal better then the, already good enough, picture obtained by directly attaching the VDC to the SCART pins as used in the previous IO board incarnation, having an amplifier stage isolates the television from the IC.

But, unfortunately, I have given up with getting a decent picture from the AD724 (PDF) composite video generator IC so will omit that section. No matter what I try I cannot get a stable picture. This is a bit of a blow as it means that it will not be possible to hook up the MAXI09 to a TV capture card, since all those that I have found have only composite or S-Video input. But it will at least save some board space on what, I suspect, will turn out to be a very large PCB.

Here is the updated schematic of the video section:
After pondering my IDE plans some more, I have come to the conclusion that I can achieve what I want, to present a 16 bit IDE drive "transparently" as an 8 bit peripheral, a lot simpler then I initially thought. I do not need to completely isolate the IDE drive from the MPU busses. Only the high byte half of the IDE databus and the Chip Select lines need be attached to DISCo. The rest of the pins can be attached directly to the MPU, as per the CPLD-based board. To read the 16 bits of IDE data from the 8 bit databus the following steps will be required:
  1. On system reset a 1 bit flag, within DISCo, is cleared.
  2. If the flag bit is clear, this is an odd numbered read. On this read to the drives address in DISCo's address range, select the IDE device by asserting the IDE Chip Selects.
  3. The IDE drive is thus active on the bus so it's low byte, will be returned to the MPU.
  4. At the same time store the high byte, which the IDE device also put out, in a temporary register in DISCo.
  5. Toggle the flag bit.
  6. If the flag bit is set this is an even numbered read. On this read, to the same address, DISCo will this time not assert the IDE Chip Selects and will instead put out the high byte, as stored in the temporary register over the databus.
  7. Toggle the flag bit again.
The process will be similar for writes, but reversed.

I believe the above should work. It's much simpler then my original plan of implementing a proper IDE host controller. One additional consideration is that bytes will have to be swapped by either the CPU, or the DMA controller, when writing. This will complicate the DMA controller implementation a little.

Here is the updated FPGA section:
A further advantage in this approach is that it frees up a large number of pins on DISCo. So many pins in fact that I can dispense with a dedicated SPI controller and instead move the SPI bus controller to DISCo. This also frees up more board space. It does mean, though, that I will have to implement an SPI bus controller myself, or perhaps adapt an existing one.

Here is the updated, and vastly simplified, SPI schematic section:
There's another, relatively minor, change here. The RTC is now a DS1305 (PDF), previously used two years ago now when I was first learning about SPI, instead of a DS3234. The reason for this change is cosmetic: the old RTC was the only SMT part in the whole computer, now that the composite and S-Video IC, and related parts, have been removed. Whilst the DS1305 requires an external crystal, and lacks a temperature sensor, it is at least a through-hole part like every other IC in the computer.

In a further effort to save board space I have decided to forgo the dedicated analogue joystick port and have combined the digital and analog inputs onto the 9 pin port usually used only for digital joysticks. A standard, four direction and one fire button joystick requires six pins. This leaves three pins free: one for the 5V side of the potentiometers, and two for the X and Y axis inputs. In theory I could build a combined five digital inputs and two axis analogue joystick, but to keep it simple I will continue to use the five input Cruiser joystick, and will make a separate two axis, one fire button, analog joystick.

After making the decision to cut down the number of digital joystick inputs by eliminating the analog joystick's fire buttons, the presence of a dedicated VIA for dealing only with ten joystick inputs started to look a bit strange. The 6522 VIA (PDF) is a complex part and relatively expensive (bought new or not) and its use simply as a joystick interface would not be good engineering. So instead the new joystick interface uses two octal D-Type latches, with tri-stating outputs, in the form of two 74HC574 (PDF). Actually the simplest solution of all would have been to use two sets of 5 pins on the DISCo FPGA but that would probably not be the best use of that resource.

Here is the updated digital IO action:

The two joystick Chip Selects (/JOY1 and /JOY2) are generated by MuDdy and are normal Selects but are gated with /READ. This unfortunately adds another pin to MuDdy (two joystick selects instead of a single VIA select), but on the other hand a pin is saved on DISCo since there will be one less interrupt line.

Finally it was time to prototype the YM3812, AKA the OPL2. Fortunately everything worked first time. I breadboarded up the circuit and managed to get a tone after programming the registers following a guide I found. The MAXI09 circuit uses a 14.318 MHz crystal oscillator can whose output will be divided down by a counter in DISCo. For completeness I have replicated this circuit but using an 8 bit counter (74HC590 (PDF)) to divide it down by four to generate the 3.574MHz NTSC colour burst frequency.

Here's a photo of the breadboard rig, showing the YM3812 section and a mock up of the joystick section consisting of some 8 way DIP switches substituting for joysticks:


Also I have received an Amiga 600 from an eBay auction I won. It was sold for spares but appears to be in a reasonable condition. Certainly the bit I care about most, the keyboard, appears to be fine. I just need to find out what connector the ribbon flex cable requires so I can prototype up a modified keyboard controller. Unfortunately, it seems the prototyping isn't quite over yet, but at least it looks like MAXI09 will have a lovely keyboard.

But because I'm so keen to get started, I'm also now in the process of laying out the PCB. It's going to be an interesting challenge, since I will be learning KiCAD's PCB tool as I go...

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